Sample Arm Cortex-A53 CPAK
Sample Arm Cortex-A53 CPAK

Getting Started

Virtual prototypes play a vital role in the design and analysis of system on chip designs. In order to maximize the time spent being productive with virtual prototypes and minimize the time required to create them, Arm supplies a rich library of Cycle Performance Analysis Kits (CPAKs). These extensible virtual prototypes come complete with models, system information and software to enable designer productivity within minutes of download.


Access CPAKs 


CPAK Features

  • Pre-built virtual prototypes featuring advanced technology such as the Arm Cortex-A72Cortex-A57, Cortex-R8 and Cortex-M7 processors
  • 100% accurate models for critical performance elements including processors, fabric, memory controllers and GPUs
  • Arm Fast Model representations to enable application software development at millions of instructions per second
  • Swap & Play, to enable the Arm Fast Model representation to switch to 100% accuracy at any software break-point
  • Bare-metal software package to initialize components and enable easy customization and benchmarking
  • Linux OS packages including source code 

Simple Customization

CPAKs are designed to be useful immediately after download, but not all SoCs are the same. To better model the behavior of your actual SoC, CPAKs can also be easily customized using SoC Designer. SoC Designer enables IP blocks to be reconfigured or replaced. Additional blocks and subsystems can also be added to the system. Designers are able to take advantage of the complete Arm model ecosystem including models from Arm IP Exchange, models compiled from RTL using Cycle Model Studio or handwritten models in C/C++ or SystemC.

Source code is also provided for all software components to enable easy customization. CPAKs minimize the setup tasks typically associated with SoC design and enable engineers to focus their efforts in more productive areas.

Architectural Analysis

CPAKs are ideally suited for accurate architectural analysis. They contain 100% accurate models compiled directly from RTL and instrumented for interactive design, debug and analysis. CPAKs let you see the behavior of the actual silicon months before it is built. This enables the designer to make architectural decisions with confidence. CPAKs take advantage of all of SoC Designer's architectural analysis and visualizations tools to give the designer unmatched insight into actual SoC behavior.

System Performance Optimization

Although many benchmarks execute on a bare-metal system, a large number of them require an OS to be present. Traditionally this presents a problem because the cycle accurate models which are so beneficial for bare metal benchmarks and optimization are simply too slow to be used with an OS. Even booting an OS on a platform containing only cycle accurate models can take days.

CPAKs for the Linux and Android OS solve this problem by using Arm's Swap & Play technology. This enables the OS to boot in seconds and get to the software area of interest for performance analysis. The system representation is then swapped to be 100% accurate (for all or just part of the system) and execution continues. This technique enables accurate benchmarking and optimizations.

Unmatched IP Integration

Your SoC design doesn't just use IP from a single vendor. Your virtual prototype representation shouldn't either. CPAKs can easily accommodate additional third party IP models. These models can either be added to the CPAK platform or used to replace a delivered component. Future CPAKs will also include select third party IP to further accelerate the integration process.

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Answered Where should I ask my question?
  • ARM Community
0 votes 1137 views 1 replies Latest 1 months ago by Oliver Beirne Answer this
Not answered Where do I find presentations and photos from SC'18? 2 votes 5169 views 0 replies Started 1 years ago by John Linford Answer this
Suggested answer Disassembly differences
  • Real Time Operating Systems (RTOS)
  • Variable
  • Arm Assembly Language (ASM)
0 votes 178 views 2 replies Latest 15 hours ago by Broeker Answer this
Answered STM32 UART DMA can receive first time correct then it receive nothing 0 votes 801 views 4 replies Latest 20 hours ago by Williams_W Answer this
Suggested answer Hardcoded Breakpoint Preventing Program From Running
  • Keil MDK
0 votes 2871 views 5 replies Latest 22 hours ago by Cassandra Answer this
Suggested answer Where to start with ARM Trust-zone development for Cortex-A series? 0 votes 613 views 3 replies Latest 23 hours ago by Westerville Answer this
Suggested answer gnu GCC option to enforce 8-byte stack alignment (necessary for R52)?
  • Cortex-R52
  • GCC
0 votes 367 views 3 replies Latest yesterday by BenjaminEhlers Answer this
Not answered compiling LLVM 11
  • LLVM
0 votes 117 views 0 replies Started yesterday by YHuerta Answer this
Not answered ARM way how to handle and generate own run time error, like try raise catch 0 votes 109 views 0 replies Started yesterday by Silicium Answer this
Suggested answer Problems about zero copy clImportMemoryARM 0 votes 358 views 2 replies Latest yesterday by m.x Answer this
Answered Keil MDK5 HTTP server - form input names
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  • server
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  • html5
0 votes 468 views 3 replies Latest yesterday by Murilo Machado Answer this
Suggested answer LPC1857 (MCB1800) Setup CAN Bus Port Manually 0 votes 364 views 2 replies Latest yesterday by Andy Neil Answer this
Answered Where should I ask my question? Latest 1 months ago by Oliver Beirne 1 replies 1137 views
Not answered Where do I find presentations and photos from SC'18? Started 1 years ago by John Linford 0 replies 5169 views
Suggested answer Disassembly differences Latest 15 hours ago by Broeker 2 replies 178 views
Answered STM32 UART DMA can receive first time correct then it receive nothing Latest 20 hours ago by Williams_W 4 replies 801 views
Suggested answer Hardcoded Breakpoint Preventing Program From Running Latest 22 hours ago by Cassandra 5 replies 2871 views
Suggested answer Where to start with ARM Trust-zone development for Cortex-A series? Latest 23 hours ago by Westerville 3 replies 613 views
Suggested answer gnu GCC option to enforce 8-byte stack alignment (necessary for R52)? Latest yesterday by BenjaminEhlers 3 replies 367 views
Not answered compiling LLVM 11 Started yesterday by YHuerta 0 replies 117 views
Not answered ARM way how to handle and generate own run time error, like try raise catch Started yesterday by Silicium 0 replies 109 views
Suggested answer Problems about zero copy clImportMemoryARM Latest yesterday by m.x 2 replies 358 views
Answered Keil MDK5 HTTP server - form input names Latest yesterday by Murilo Machado 3 replies 468 views
Suggested answer LPC1857 (MCB1800) Setup CAN Bus Port Manually Latest yesterday by Andy Neil 2 replies 364 views