SUSE delivers a Linux distribution that is optimized for 64-bit Arm systems, as well as an Arm-based platform for High Performance Computing (HPC).

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SUSE is the largest independent open source company, providing open source solutions and technologies for the enterprise to simplify, modernize, and accelerate traditional and cloud-native applications across the IT landscape in any environment including Arm.

SUSE offers open source solutions, services, and support in three key areas: 

  • Enterprise Linux and Containers
  • Cloud Computing including hybrid cloud
  • Edge Computing

SUSE Linux Enterprise Server

SUSE Linux Enterprise Server for Arm is an enterprise-grade Linux distribution that is optimized for unique 64-bit Arm chip capabilities. It enables solutions providers and enterprise early adopters to gain faster time to market for innovative server and Internet of Things (IoT) devices solutions.

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High Performance Computing

SUSE Linux Enterprise for High Performance Computing (HPC) is a highly scalable, high-performance open source operating system that is designed to utilize the power of parallel computing for modeling, simulation, and advanced analytics applications.

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SUSE open source repositories

SUSE builds from a range of community projects and programs. Developers can experiment with new features using openSUSE and Tumbleweed. openSUSE Build Service provide developers with the infrastructure where Arm-based packages are built including additional software from the SUSE Package Hub. 

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Resources


Community Forums

Not answered LPC1857 (MCB1800) Setup CAN Bus Port Manually 0 votes 58 views 0 replies Started 2 days ago by Nicholas_ Answer this
Suggested answer casal instruction is slower than ldxr/stlxr in glibc atomic_compare_exhchange 0 votes 206 views 2 replies Latest 9 days ago by zca Answer this
Not answered CORTEX-A8 0 votes 67 views 0 replies Started 9 days ago by JackShan Answer this
Not answered Debug problem of FM4-S6E2CC-ETH 0 votes 79 views 0 replies Started 11 days ago by yuanxing1992 Answer this
Not answered L1 cache BW 0 votes 92 views 0 replies Started 19 days ago by icurry Answer this
Not answered Exception Level Switch in ARMv8 0 votes 96 views 0 replies Started 19 days ago by icurry Answer this
Not answered LPC1857 (MCB1800) Setup CAN Bus Port Manually Started 2 days ago by Nicholas_ 0 replies 58 views
Suggested answer casal instruction is slower than ldxr/stlxr in glibc atomic_compare_exhchange Latest 9 days ago by zca 2 replies 206 views
Not answered CORTEX-A8 Started 9 days ago by JackShan 0 replies 67 views
Not answered Debug problem of FM4-S6E2CC-ETH Started 11 days ago by yuanxing1992 0 replies 79 views
Not answered L1 cache BW Started 19 days ago by icurry 0 replies 92 views
Not answered Exception Level Switch in ARMv8 Started 19 days ago by icurry 0 replies 96 views