Marvell ThunderX is the leading high-performance, standards-compliant Arm-based CPU with broad industry and ecosystem support.

Learn more

Marvell ThunderX server processors power supercomputers – including Astra, the first Top500 Arm-based supercomputer, to rack-mounted servers in cloud or edge data centers, to high-performance developer workstations.

Standards compliant

ThunderX is a high-performance implementation of an Armv8-based server processor. ThunderX platforms are certified Arm ServerReady, Server Based System Architecture (SBSA), and Server Base Boot Requirements (SBBR) compliant and are available from partner vendors and cloud providers. Developers have the freedom to choose their favorite SBBR-compliant operating system distributions.

Learn more

Broad ecosystem support

ThunderX is enabled for upstream projects and widely tested in open source communities including Linaro and OpenHPC. Marvell ThunderX servers enable the Arm Continuous Integration and Continuous Delivery (CI/CD)  infrastructure of various operating system distribution communities and ecosystem enablement programs such as WorksOnArm.

Learn more

Partner solutions

In addition to open source solutions, Marvell has a broad range of hardware and software partners who have developed and validated commercial solutions on ThunderX-based platforms. Examples include HPC tools from Arm Allinea, EDA solutions from Cadence and HPE, and GPU solutions from One Stop Systems.

Learn more

Resources


Marvell-Community Forums

Not answered access secure generic timer
  • ARMv8 Exception Model
  • Security
  • Arm64
0 votes 68 views 0 replies Started 7 days ago by armsss Answer this
Not answered How do branch instructions influence the performance of Cortex-A77? 0 votes 81 views 0 replies Started 9 days ago by hyf_sysu Answer this
Suggested answer Getting Dummy character while receiving UART data,How to fix it ? 0 votes 455 views 2 replies Latest 10 days ago by Jerome Decamps - 杜尚杰 Answer this
Suggested answer Sht11 interfacing with lpc1758 0 votes 130 views 1 replies Latest 14 days ago by Andy Neil Answer this
Suggested answer Arm Cortex A57 controller 0 votes 287 views 1 replies Latest 15 days ago by Tyler_p Answer this
Not answered M7 to NIC-400 connectivity via AXIM
  • Cortex-M7
  • CoreLink NIC-400 Network Interconnect
0 votes 87 views 0 replies Started 20 days ago by Ramaswamy Vishwanath Answer this
Not answered access secure generic timer Started 7 days ago by armsss 0 replies 68 views
Not answered How do branch instructions influence the performance of Cortex-A77? Started 9 days ago by hyf_sysu 0 replies 81 views
Suggested answer Getting Dummy character while receiving UART data,How to fix it ? Latest 10 days ago by Jerome Decamps - 杜尚杰 2 replies 455 views
Suggested answer Sht11 interfacing with lpc1758 Latest 14 days ago by Andy Neil 1 replies 130 views
Suggested answer Arm Cortex A57 controller Latest 15 days ago by Tyler_p 1 replies 287 views
Not answered M7 to NIC-400 connectivity via AXIM Started 20 days ago by Ramaswamy Vishwanath 0 replies 87 views