Accelerate your wireless base station layer-1 software using the Arm RAN Acceleration Library.
Arm RAN Acceleration Library is an optimized set of software routines to implement common signal processing functions in Radio Access Network (RAN) using Neoverse and Cortex-A Arm cores.
Software Defined Radio approach
Traditional wireless base stations are implemented using a combination of general-purpose processors, DSP, and dedicated hardware accelerators.
The Arm RAN Acceleration Library takes advantage of the SIMD vector extensions of high-performance Neoverse cores to enable fast development of Software Defined Radio components for 5G PHY.
Open RAN platform innovation
High performance math kernels and signal processing primitives from the Arm RAN Acceleration Library enable very flexible hardware accelerator and software splits for the design of 5G New Radio Layer-1 functionality.
This design flexibility enables power efficient and cost-optimized wireless base station implementations using Arm Neoverse cores.
- Complex floating point and integer datatypes supported for all math kernels
- Highly optimized implementations for Arm Neon pipelines
- Works on any Neoverse and Arm Cortex-A cores
View the release history, release notes, and EULA for the Arm RAN Acceleration Library.
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|Answered||Forum FAQs Started 1 months ago by Annie Cracknell||0 replies 233 views|
|Not answered||Where can I download ESL API related files？ Started 3 days ago by newplayer||0 replies 39 views|
|Not answered||How to measure power, current, voltage of arm core on raspberry pi 4 b? Started 11 days ago by Hooniehun||0 replies 77 views|
|Not answered||Freertos in data acquisition is not consistent sampling rate . Started 13 days ago by lschung||0 replies 137 views|
|Not answered||Platforms featuring MMU-600 or any SMMUv3 Started 15 days ago by josecm||0 replies 82 views|
|Not answered||Find real low power consumption for rack board ? Started 21 days ago by Jerome Decamps - 杜尚杰||0 replies 104 views|