Arm Corstone

Build a Secure IoT System on Chip

Arm Corstone provides everything you need to start your SoC design, helping you build SoCs faster and more securely, with the right architecture choice, integration and verification.

At the heart of Corstone is one of the subsystem reference designs. Each one is an implementation of an Arm-defined subsystem architecture. It is a complete solution for architecting the system, making it secure and able to handle the complex power-control infrastructure, while balancing trade-offs between performance and power.

Corstone block diagram

  • Arm has integrated the processor(s), system IP, memory system, debug, security IP and other Arm IP together, simplifying the design process and handling the power control, security and performance in an optimised way.
  • Hundreds of hours of verification work has been dedicated to these subsystems, allowing you to benefit from getting to market quickly.
  • Each subsystem is configurable, modifiable, enabling you to focus on differentiation by customizing the system to meet your unique needs.
  • Corstone has been designed to be extensible so you can build the rest of your SoC on top of the system.
  • Simplify software development with easier porting of open-source Trusted Firmware-M (TF-M) for an accelerated route to PSA Certified.
  • Design confidently with FPGA and Fixed Virtual Prototyping (FVP) platforms based on Corstone. Choose from well supported RTOSs such as as RTX, FreeRTOS, Zephyr and Mbed OS to further reduce software development cost.

Get started

Explore the Corstone packages available for your SoC design.

Component Corstone-101
Corstone-102
Corstone-200
Corstone-201
Corstone-700
Corstone Reference Design Subsystems
SSE-050 Subsystem (Cortex-M3 based)
Yes
Yes  Yes  Yes  Yes 
SSE-123 Example Subsystem (Cortex-M23 based)   Yes
  Yes
Yes
SSE-200 Subsystem (dual Cortex-M33 based)
    Yes
Yes
Yes
SSE-700 Subsystem (Cortex-A32 and Cortex-M based)
        Yes
System IP
CM0SDK and CMSDK (common IP blocks)
Yes
Yes
Yes  Yes  Yes 
True Random Number Generator (TRNG) Real-Time Clock (RTC) Yes
Yes  Yes  Yes  Yes 
CoreLink AHB Flash Cache
Yes
Yes  Yes  Yes  Yes 
CoreLink GFC-100 Flash Controller (single port)
Yes  Yes    Yes
Yes
CoreLink GFC-200 Flash Controller (dual port)
  Yes
  Yes
Yes
CoreLink SIE-200 (TrustZone System IP)
  Yes
Yes
Yes
Yes
CoreLink LPD-500 (power control)
    Yes
   
CoreLink PCK-600 (power control)
  Yes

Yes
Yes
CoreLink SDC-600 (authenticated debug)
      Yes
Yes
CoreSight SoC-400M (standard debug)
      Yes

CoreSight-600 (enhanced debug)
        Yes 
XHB-500 (AHB5 and AXI bridging IP)
        Yes
NIC-450 (network interconnect)
        Yes
CoreSight STM-500 System Trace Macro
        Yes
IntMemAxi (Internal memory interface)
        Yes
UART
        Yes
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Are you looking to grow your IoT portfolio quickly and with minimal risk? Find out how to license processor and Corstone IP, or talk to an Arm expert.

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Arm training courses and on-site system-design advisory services enable licensees to realize maximum system performance with lowest risk and fastest time-to-market.

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Community Forums

Answered ARM vs Thumb vs Thumb2 instruction set
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0 votes 9876 views 2 replies Latest 18 days ago Answer this
Answered ARM/THUMB instructions that change execution path?
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Answered AMBA 5 CHI Link Layer (L-Credit Return)
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Answered strobe 0 votes 7653 views 3 replies Latest 1 months ago by Christopher Tory Answer this
Answered AXI4-Relationships between the channels 0 votes 3023 views 1 replies Latest 1 months ago by Colin Campbell Answer this
Answered ARM vs Thumb vs Thumb2 instruction set Latest 18 days ago by Kevin B 2 replies 9876 views
Answered ARM/THUMB instructions that change execution path? Latest 19 days ago by jakebunt 77 replies 63439 views
Answered AMBA 5 CHI Link Layer (L-Credit Return) Latest 25 days ago by Christopher Tory 3 replies 3239 views
Answered Is AXI4 Ordered write observation used to support PCIE Producer/Consumer ordering model? Latest 26 days ago by Christopher Tory 1 replies 1727 views
Answered strobe Latest 1 months ago by Christopher Tory 3 replies 7653 views
Answered AXI4-Relationships between the channels Latest 1 months ago by Colin Campbell 1 replies 3023 views