Corstone

At the heart of Corstone is one of the subsystem reference designs. Each one is an implementation of an Arm-defined subsystem architecture. It is a complete solution for architecting the system, making it secure and able to handle the complex power-control infrastructure, while balancing trade-offs between performance and power.

• Arm has integrated the processor(s), system IP, memory system, debug, security IP and other Arm IP together, simplifying the design process and handling the power control, security and performance in an optimised way.
• Hundreds of hours of verification work has been dedicated to these subsystems, allowing you to benefit from getting to market quickly.
• Each subsystem is configurable, modifiable, enabling you to focus on differentiation by customizing the system to meet your unique needs.
• Corstone has been designed to be extensible so you can build the rest of your SoC on top of the system.
• Simplify software development with easier porting of open-source Trusted Firmware-M (TF-M) for an accelerated route to PSA Certified.
• Design confidently with FPGA and Fixed Virtual Prototyping (FVP) platforms based on Corstone. Choose from well supported RTOSs such as as RTX, FreeRTOS, Zephyr and Mbed OS to further reduce software development cost.

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Explore the Corstone packages available for your SoC design.

Component	Corstone-101	Corstone-102	Corstone-200	Corstone-201	Corstone-700
Corstone Reference Design Subsystems
SSE-050 Subsystem (Cortex-M3 based)
SSE-123 Example Subsystem (Cortex-M23 based)
SSE-200 Subsystem (dual Cortex-M33 based)
SSE-700 Subsystem (Cortex-A32 and Cortex-M based)
System IP
CM0SDK and CMSDK (common IP blocks)
True Random Number Generator (TRNG) Real-Time Clock (RTC)
CoreLink AHB Flash Cache
CoreLink GFC-100 Flash Controller (single port)
CoreLink GFC-200 Flash Controller (dual port)
CoreLink SIE-200 (TrustZone System IP)
CoreLink LPD-500 (power control)
CoreLink PCK-600 (power control)
CoreLink SDC-600 (authenticated debug)
CoreSight SoC-400M (standard debug)
CoreSight-600 (enhanced debug)
XHB-500 (AHB5 and AXI bridging IP)
NIC-450 (network interconnect)
CoreSight STM-500 System Trace Macro
IntMemAxi (Internal memory interface)
UART
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