Specifications

The first Arm processor designed specifically for implementation in FPGAs.

The Cortex-M1 processor targets FPGA devices and includes support for leading FPGA synthesis tools, allowing the designer to choose the optimal implementation for each project. 

The Cortex-M1 processor enables OEMs to achieve significant cost savings through rationalization of software and tools investments across multiple projects spanning FPGA, ASIC and ASSP, plus greater vendor independence through use of an industry-standard processor.

Arm DesignStart FPGA provides instant and free access to Cortex-M1 soft CPU IP for use on FPGA designs for prototypes and commercial deployments.

Learn more about DesignStart.

Arm Cortex-M1 processor

Architecture Armv6-M
Bus Interface AMBA  AHB-Lite, Von Neumann Bus Architecture with optional Tightly Coupled Memory interfaces (I-TCM and D-TCM)
ISA Support Thumb/Thumb-2 subset
Pipeline Three-stage
SysTick Timer Optional
Multiplier Options of fast or area optimized 32-x32 multiplier
Bit Manipulation Bit banding region can be implemented with Corstone Foundation IP
Interrupts Non-maskable interrupt (NMI) +1 to 32 interrupts (configurable)
Wakeup Interrupt Controller None
Interrupt Priority Levels 4 priority levels per interrupt
Instruction and Data Tightly Coupled Memories 0K - 1024K (configurable)
Debug Full or reduced debug (full - 4 breakpoint comparators, 2 watchpoint comparators)

Characteristics

Performance Efficiency: 1.85 CoreMark/MHz* and 0.8 DMIPS/MHz


Cortex-M comparison table

Download the following PDF datasheet to compare the specifications of Cortex-M processors.

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