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Architecture support for floating-point

Floating-point is an optional extension to the Arm® architecture. There are versions that provide additional instructions.

The floating-point instruction set supported in A32 is based on VFPv4, but with the addition of some new instructions, including the following:

  • Floating-point round to integral.
  • Conversion from floating-point to integer with a directed rounding mode.
  • Direct conversion between half-precision and double-precision floating-point.
  • Floating-point conditional select.

In AArch32 state, the register bank consists of thirty-two 64-bit registers, and smaller registers are packed into larger ones, as in Armv7 and earlier.

In AArch64 state, the register bank includes thirty-two 128-bit registers and has a new register packing model.

Floating point instructions in A64 are closely based on VFPv4 and A32, but with new instruction mnemonics and some functional enhancements.