Store-Release Exclusive Register Byte.
- Is the 32-bit name of the general-purpose register into which the status result of the store exclusive is written. The value returned is.
- If the operation updates memory.
- If the operation fails to update memory.
- Is the 32-bit name of the general-purpose register to be transferred.
- Is the 64-bit name of the general-purpose base register or stack pointer.
If a synchronous Data Abort exception is generated by the execution of this instruction:
- Memory is not updated.
is not updated.
Whether the detection of memory aborts happens before or after the check on the local Exclusive Monitor depends on the implementation. As a result a failure of the local monitor can occur on some implementations even if the memory access would give a memory abort.
Store-Release Exclusive Register Byte stores a byte from a 32-bit register to memory if the PE has exclusive access to the memory address, and returns a status value of 0 if the store was successful, or of 1 if no store was performed. See Synchronization and semaphores in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile. The memory access is atomic. The instruction also has memory ordering semantics as described in Load-Acquire, Store-Release in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile. For information about memory accesses see Load/Store addressing modes in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile.