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Load Register Halfword (unprivileged).


LDTRH Wt, [Xn|SP{, #simm}]


Is the 32-bit name of the general-purpose register to be transferred.
Is the 64-bit name of the general-purpose base register or stack pointer.
Is the optional signed immediate byte offset, in the range -256 to 255, defaulting to 0.


Load Register Halfword (unprivileged) loads a halfword from memory, zero-extends it, and writes the result to a register. The address that is used for the load is calculated from a base register and an immediate offset.

The memory is restricted as if execution is at EL0 when:

  • Executing at EL1.
  • Executing at EL2, in Arm®v8.1, with HCR_EL2.{E2H, TGE} set to {1, 1}.

Otherwise, the access permission is for the Exception level at which the instruction is executed. For information about memory accesses, see Load/Store addressing modes in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile.