Reverse elements in 32-bit words (vector).
- Is the name of the SIMD and FP destination register.
Is an arrangement specifier, and can be one of
- Is the name of the SIMD and FP source register.
Reverse elements in 32-bit words (vector). This instruction reverses the order of 8-bit or 16-bit elements in each word of the vector in the source SIMD and FP register, places the results into a vector, and writes the vector to the destination SIMD and FP register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.