Conditional execution in AArch64 state
In AArch64 state, the NZCV register holds copies of the N, Z, C, and V condition flags. The processor uses them to determine whether or not to execute conditional instructions. The NZCV register contains the flags in bits[31:28].
The condition flags are accessible in all exception levels,
makes less use of conditionality than A32. For example, in A64:
- Only a few instructions can set or test the condition flags.
- There is no equivalent of the T32
- The only conditionally executed instruction, which
behaves as a NOP if the condition is false, is the conditional branch,