Return From Exception.
is any one of the following:
Increment address After each transfer (Full Descending stack)
Increment address Before each transfer (ARM only)
Decrement address After each transfer (ARM only)
Decrement address Before each transfer.
is omitted, it defaults to Increment After.
is an optional condition code.Note
is permitted only in Thumb code, using a preceding
ITinstruction. This is an unconditional instruction in ARM code.
specifies the base register.
must not be PC.
is an optional suffix. If ! is present, the final address is written back into
You can use
RFE to return from
an exception if you previously saved the return state using the
usually the SP where the return state information
Loads the PC and the CPSR from the address contained in
and the following address. Optionally updates
RFE writes an address to the PC.
The alignment of this address must be correct for the instruction set
in use after the exception return:
For a return to ARM, the address written to the PC must be word-aligned.
For a return to Thumb, the address written to the PC must be halfword-aligned.
For a return to Jazelle, there are no alignment restrictions on the address written to the PC.
No special precautions are required in software to follow these rules, if you use the instruction to return after a valid exception entry mechanism.
Where addresses are not word-aligned,
the least significant two bits of
The time order of the accesses to individual words of memory
RFE is not architecturally
defined. Do not use this instruction on memory-mapped I/O locations
where access order matters.
Do not use
RFE in unprivileged
This ARM instruction is available in ARMv6 and above.
This 32-bit Thumb instruction is available in ARMv6T2 and above, except the ARMv7-M architecture.
There is no 16-bit version of this instruction.