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Multiply-Accumulate with signed or unsigned 32-bit operands, giving the least significant 32 bits of the result.


MLA{S}{cond} Rd, Rn, Rm, Ra



is an optional condition code.


is an optional suffix. If S is specified, the condition flags are updated on the result of the operation.


is the destination register.

Rn, Rm

are registers holding the values to be multiplied.


is a register holding the value to be added.


The MLA instruction multiplies the values from Rn and Rm, adds the value from Ra, and places the least significant 32 bits of the result in Rd.

Register restrictions

Rn must be different from Rd in architectures before ARMv6.

You cannot use PC for any register.

You can use SP in ARM instructions but this is deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.

Condition flags

If S is specified, the MLA instruction:

  • Updates the N and Z flags according to the result.

  • Corrupts the C and V flag in ARMv4.

  • Does not affect the C or V flag in ARMv5T and above.


The MLA ARM instruction is available in all versions of the ARM architecture.

This 32-bit Thumb instruction is available in ARMv6T2 and above.


 MLA     r10, r2, r1, r5