Count Leading Zeros.
is an optional condition code.
is the destination register.
is the operand register.
CLZ instruction counts the
number of leading zeros in the value in
returns the result in
result value is 32 if no bits are set in the source register, and
zero if bit 31 is set.
You cannot use PC for any operand.
You can use SP in these ARM instructions but this is deprecated in ARMv6T2 and above.
You cannot use SP in Thumb instructions.
This instruction does not change the flags.
This ARM instruction is available in ARMv5T and above.
This 32-bit Thumb instruction is available in ARMv6T2 and above.
There is no 16-bit version of this instruction in Thumb.
CLZ r4,r9 CLZNE r2,r3
CLZ Thumb instruction followed
by a left shift of
Rm by the
Rd value to normalize
the value of register
MOV, to flag the case where
CLZ r5, r9 MOVS r9, r9, LSL r5