The Wakeup Interrupt Controller (WIC) is a peripheral that can detect an interrupt and wake the processor from deep sleep mode. The WIC is enabled only when the system is in deep sleep mode.
The WIC is not programmable, and does not have any registers or user interface. It operates entirely from hardware signals.
When the WIC is enabled and the processor enters deep sleep mode, the power management unit in the system might power down the Cortex-M3 core while retaining its software context. Wakeup operation requires the WIC to be powered up. When the WIC receives an interrupt, it takes a number of clock cycles to wakeup the processor and restore its state to enable it to process the interrupt. Therefore, the interrupt latency is increased in deep sleep mode.
The WIC in the SSE-100 is implemented using latches, which differs from the implementation in the Cortex-M3 processor. This means that FCLK can be gated completely during WIC-based deep sleep. This is not a standard Cortex-M3 feature, so it requires special implementation considerations.
For more information about the WIC, see the Arm® Cortex®-M3 Processor Technical Reference Manual and the Arm® CoreLink™ SSE-100 Subsystem Implementation and Integration Manual.