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3.5. Interrupts

This section describes the (Nested Vectored Interrupt Controller) NVIC and the interrupt signal map. The NVIC supports:

  • An implementation-defined number of interrupts, in the range 4-240 interrupts.

  • A programmable priority level of 0-255 for each interrupt. A higher level corresponds to a lower priority, so level 0 is the highest interrupt priority.

  • Level and pulse detection of interrupt signals.

  • Dynamic reprioritization of interrupts.

  • Grouping of priority values into group priority and subpriority fields.

  • Interrupt tail-chaining.

  • An external Non-Maskable Interrupt (NMI).

  • Optional WIC, providing ultra-low power sleep mode support.