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ACLE support

Arm® Compiler 6 supports the Arm C Language Extensions (ACLE) 2.1 with a few exceptions.

Note

This topic includes descriptions of [ALPHA] and [BETA] features. See Support level definitions.

Arm Compiler 6 does not support:

  • __ARM_ALIGN_MAX_PWR macro.
  • __ARM_ALIGN_MAX_STACK_PWR macro.
  • __cls intrinsic.
  • __clsl intrinsic.
  • __clsll intrinsic.
  • __saturation_occurred intrinsic.
  • __set_saturation_occurred intrinsic.
  • __ignore_saturation intrinsic.
  • Patchable constants.
  • Floating-point data-processing intrinsics.

Arm Compiler 6 does not model the state of the Q (saturation) flag correctly in all situations.

Additional supported intrinsics

Arm Compiler 6 also provides:

  • Support for the ACLE defined dot product intrinsics in AArch64 and AArch32 states.
  • [BETA] Support for the ACLE defined Armv8.2-A half-precision floating-point scalar and vector intrinsics in AArch64 state.
  • [BETA] Support for the ACLE defined Armv8.2-A half-precision floating-point vector intrinsics in AArch32 state.
  • [ALPHA] Support for the ACLE defined BFloat16 floating-point scalar and vector intrinsics in AArch64 and AArch32 states.
  • [ALPHA] Support for the ACLE defined Matrix Multiplication scalar and vector intrinsics in AArch64 and AArch32 states.
  • Support for the ACLE defined Memory Tagging Extension (MTE) intrinsics.
  • Support for the ACLE defined M-profile Vector Extension (MVE) intrinsics.
  • Support for the ACLE defined Transactional Memory Extension (TME) intrinsics.
  • Support for these additional floating-point intrinsics:

    • __arm_rsrf
    • __arm_wsrf
    • __arm_rsrf64
    • __arm_wsrf64

For more information on ACLE 2.1, see the ACLE 2.1 specification.

For updates on the latest ACLE intrinsics, see the Arm C Language Extensions.

For more information on intrinsics that use the Advanced SIMD registers, see the Neon Intrinsics Reference.

For more information on the MVE intrinsics, see the MVE Intrinsics Reference.