The Arm® Compiler toolchain supports targets that implement the Scalable Vector Extension (SVE) EAC (00rel2) for Armv8‑A AArch64.
SVE is the next-generation SIMD instruction set for AArch64, that introduces the following new architectural features for High Performance Computing (HPC):
- Scalable vector length.
- Per-lane predication.
- Gather-load and scatter-store.
- Fault-tolerant speculative vectorization.
- Horizontal and serialized vector operations.
This release of the Arm Compiler toolchain lets you:
- Assemble source code containing SVE instructions.
- Disassemble ELF object files containing SVE instructions.
- Compile C and C++ code for SVE-enabled targets, with an advanced auto-vectorizer capable of taking advantage of SVE features.
- Use intrinsics to write SVE instructions directly from C code.
NoteThe Arm Compiler toolchain only supports bare-metal applications.
This document provides information about the features of the Arm Compiler toolchain that specifically relate to SVE. For information about the other features, see the Arm Compiler documentation.