An Instruction Set Architecture (ISA) is part of the abstract model of a computer. It defines how software controls the CPU.
The Arm ISA family allows developers to write software and firmware that conforms to the Arm specifications, secure in the knowledge that any Arm-based processor will execute it in the same way. This is the foundation of the Arm portability and compatibility promise, underlying the Arm ecosystem.
Arm Instruction Set Architecture
The Arm architecture supports three instruction sets: A64, A32 and T32.
- The A64 and A32 instruction sets have fixed instruction lengths of 32-bits.
- The T32 instruction set was introduced as a supplementary set of 16-bit instructions that supported improved code density for user code. Over time, T32 evolved into a 16-bit and 32-bit mixed-length instruction set. As a result, the compiler can balance performance and code size trade-off in a single instruction set.
Explore these instruction sets:
A64 instruction set
The A64 instruction set, introduced in Armv8-A to support the 64-bit architecture.
A32 instruction set
The A32 instruction set, referred to as ‘ARM’ in Armv6 and Armv7 architectures.
T32 instruction set
The T32 instruction set, referred to as ‘Thumb’ in Armv6 and Armv7 architectures.
Arm Architecture Extensions
Arm provides a number of architecture extensions to address the needs of the next wave of compute. These extensions provide new capabilities for Arm IP.
Arm Custom Instructions support the intelligent and rapid development of fully integrated custom CPU instructions without software fragmentationLearn more
Arm Cortex processors with digital signal processing (DSP) extensions offer high performance signal processing with flexible, easy-to-use programmingLearn more
The Arm architecture provides high-performance and high-efficiency hardware support for floating-point operations in half-, single-, and double-precision arithmeticLearn more
Arm Helium technology is an extension of the Armv8.1-M architecture and delivers a significant performance uplift for machine learning and digital signal processing applicationsLearn more
Arm Neon technology is an advanced Single Instruction Multiple Data (SIMD) architecture extension for the Arm Cortex-A processor series and for Cortex-R52 and Cortex-R82 processorsLearn more
The ISAs commonality and differentiation guide describes some of the features that are specific to each Arm Instruction Set Architecture (ISA) and considers which applications make best use of the ISA features. The focus of the guide is Cortex-R. However, we also consider Cortex-A and Cortex-M, in the context of helping a developer make the right choice for their project.
|Not answered||Where do I find presentations and photos from SC'18?||2 votes||4843 views||0 replies||Started 1 years ago by John Linford||Answer this|
|Suggested answer||problems with timers and i2c||0 votes||119 views||1 replies||Latest yesterday by Andy Neil||Answer this|
|Not answered||Does Keil MDK5 support any RTOS with Bluenrg-2?||0 votes||127 views||0 replies||Started yesterday by Cletus87408||Answer this|
|Suggested answer||C library folder structure||0 votes||176 views||2 replies||Latest 2 days ago by Clonimus74||Answer this|
|Not answered||Where do I find presentations and photos from SC'18? Started 1 years ago by John Linford||0 replies 4843 views|
|Suggested answer||problems with timers and i2c Latest yesterday by Andy Neil||1 replies 119 views|
|Not answered||Does Keil MDK5 support any RTOS with Bluenrg-2? Started yesterday by Cletus87408||0 replies 127 views|
|Suggested answer||C library folder structure Latest 2 days ago by Clonimus74||2 replies 176 views|